Hang Su

About Me

Hang Su (苏杭)

Department of Computer Science

University of Virginia

Email: hs2nu@virginia.edu

Github: tonyfloatersu

Blog: Nomad Note

Research Interest

Cryptography, Computer Security, Programming Language Theory.

I am also broadly interested in theoretical computer science.

Education

Publications

Shorter and Faster Post-Quantum Designated-Verifier zkSNARKs from Lattices (To Appear)

Yuval Ishai, Hang Su, and David J. Wu. In ACM Conference on Computer and Communications Security (CCS). 2021.

[Paper (Full Version)] [ePrint Version] [Sample Implementation]

Research Experience

Research Assistant advised by Dr. David J. Wu at University of Virginia, Jan., 2020 - May., 2021

Research Topic: Zero-Knowledge Succinct Non-Interactive Argument of Knowledge (zkSNARK) from Lattice-Based Cryptography Assumption.

  • Implemented a lattice-based post-quantum secure zkSNARK over extension fields with smaller parameters.
  • Designed an concrete-efficient Module-Learn-With-Error (MLWE) based encryption scheme.
  • Developed a variant Fast Fourier Transform (FFT) over cosets for fields with small characteristics.
  • Built a high-performance proof-of-concept implementation fully using C++.
  • Obtained 10.3x smaller proof size than previous post-quantum candidates.
  • Achieved 42.1x smaller proof size and 60.2x faster prover time than previous lattice-based candidates, all while achieving a much higher level of soundness.
  • Published a first-authored full length paper at ACM CCS 2021, Seoul, South Korea.

Research Assistant advised by Dr. Tim Menzies at North Carolina State University, Spring 2018

Research Topic: Topic Modeling in Human-Readable Structure.

  • Developed a faster and more succinct topic modeling method based on Latent Dirichlet Allocation.
  • Accelerated topic classification within a tolerable range of error.
  • Comprehended the mechanism of state-of-art practical data mining skills.

Research Assistant at Emerging Computing Technology Laboratory, Shanghai Jiaotong University, Fall 2017

Research Topic: Logic Circuit Delay Decrease and Approximate Logic Synthesis Algorithms.

  • Proposed applying max-flow min-cut algorithm on approximated Boolean Function.
  • Developed a robust library for BLIF format logic circuit file parsing.
  • Built a rapid logic circuit simulator by translating target circuit into C++, and benchmarking over compiled code.
  • Simulator achieved over 5000x speed-boost compared to simulation based naive implementations.

Teaching Experience

Served over 150 students in UM-SJTU-JI.

  • Teaching Assistant for VE216 (Signal and System), Shanghai Jiaotong University, (May., 2018 - Aug., 2018)
    • Led weekly lab sessions, met one-to-one with students during weekly office hours.
    • Assisted instructor in designing exams and projects.
  • Teaching Assistant for VE482 (Operating System), Shanghai Jiaotong University, (Sep., 2018 - Dec., 2018)
    • Led weekly recitation class, graded exams and homeworks.
    • Maintained the first course grading server in institute, system served over 100 students without failure or crash.

MISC

I have many awesome friends (the list keeps growing), and you may find their stuffs interesting too: